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Design Techniques for High Performance Continuous-Time Delta-Sigma Conversion

Shanti Pavan (Indian Institute of Technology, Madras)

Half-Day Tutorial

Keywords:

Oversampling, analogtodigital converters, ADC, mixedsignal design, Continuoustime sigmadelta, multi bit converters, dynamic element matching, noise shaping.

Detailed Tutorial Program:

Topics to be covered :

(i)              Quick review of the basics of Continuoustime Delta Sigma Modulation

 

(ii)            Problems with continuoustime modulators :

 

(a) Excess Loop Delay – recent advancements and techniques for compensation.

(b) Clock Jitter – recent developments and techniques to minimize effect of jitter.

(c) Systematic Design Centering – Determining coefficients in a robust and reliable way when practical opamps/transconductors are considered.

(d) Loop filter Nonlinearity : Understanding loop filter nonlinearities and their effects on CTDSM performance. Techniques to rapidly simulate nonlinearity.

(e) Mitigation of Nonlinearity : Circuit techniques to enhance the linearity of CTDSMs with reduced power dissipation – opamp design considerations, and the ``assisted” opamp technique.

 

 (iii) Case Studies :

(a) Low Power, High Resolution Single Bit and Multibit Modulators for Audio.

(b) High speed, 15 MHz bandwidth CTDSM with medium resolution in 0.18um CMOS.

 

PRESENTER BIOGRAPHY:

Dr. Shanthi Pavan

Shanthi Pavan obtained the B.Tech degree in Electronics and Communication Engg from the Indian Institute of Technology, Madras in 1995 and the M.S and Sc.D degrees from Columbia University, New York in 1997 and 1999 respectively. From 1997 to 2000, he was with Texas Instruments in Warren, New Jersey, where he worked on high speed analog filters and data converters. From 2000 to June 2002, he worked on microwave ICs for data communication at Bigbear Networks in Sunnyvale, California. Since July 2002, he has been with the Indian Institute of TechnologyMadras, where he is now a Professor of Electrical Engineering. His research interests are in the areas of high speed analog circuit design and signal processing.

Dr.Pavan is the recipient of the IEEE Circuits and Systems Society Darlington Best Paper Award (2009), the Swarnajayanthi Fellowship (from the Government of India), the Young Faculty Recognition Award from IIT Madras (for excellence in teaching), the Technomentor Award from the India Semiconductor Association and the Young Engineer Award from the Indian National Academy of Engineering (2006). Dr.Pavan is an Associate Editor of the IEEE Transactions on Circuits and Systems: Part I Regular Papers, and earlier served on the editorial board of the IEEE Transactions on Circuits and Systems Part II Express Briefs from 2006 2007.

He is the coauthor (along with Yannis Tsividis) of the book High Frequency Continuous Time Filters in Digital CMOS Processes. (Kluwer, 2001)

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